News and New Products

Pushing the DSP Speed Envelope

By Mark Long -- e-inSITE, 5/5/2003

Texas Instruments (TI) reports that it has reached the 1GHz speed threshold for its digital signal processing technology and expects to introduce its first DSP to offer 1GHz/4000 MMACS performance beginning in 1H04.

The high-performance technology is expected to foster the development of next-generation designs targeted at home media centers, content delivery, streaming media, and in real-time artificial vision applications. To enable developers to move quickly to 1GHz, the next-generation devices will retain software compatibility with the company's previous-generation DSPs.

The speed upgrade represents more than a 40 percent boost over TI's current 720 MHz technology. The company says that its achievement of 1 GHz performance is due to improvements made to the design of the company's TMS320C64x DSP architecture as well as a change in process technologies. The C64 architecture features a deep platform pipe for boosting processing flexibility while at the same time ratcheting up clock rates.

By the first half of next year, the C64x architecture will be scalable to clock speeds of up to 1.1 GHz. However, in an interview held last month at ESC2003, TI's Advanced Architecture Development Manager Ray Simar said that 1GHz is only the beginning and that the architecture is poised to enable further speed upgrades.

Market Prospects

In-Stat/MDR senior analyst Marcus Levy thinks that when it comes to sheer speed today's 1GHz announcement from TI is probably conservative. Levy would not be surprised to actually see TI bumping up against the 1.3GHz barrier when it first 90-nm products roll off the assembly line next year. 

So far TI has not had much to say concerning any modifications to its C64 architecture other than reporting that it has made a few micro-architectural improvements involving register forwarding. But Levy expects the company will be providing some additional details a presentation at next month's Embedded Microprocessor Forum in San Jose.

"This presentation should give all observers an appreciation of how difficult it is to reach 720MHz and beyond with a processor of this magnitude, balancing high clock rates and high efficiency," he added.

When Levy recently put TI's 720MHz chip through benchmark tests on behalf of the EEMBC organization TI's it demonstrated performance levels that are currently unrivaled. To get some appreciation for what a 1GHz chip might do, Levy says that one merely has to scale the 720MHz DSP's benchmark results upwards in a linear fashion for those tests involving the use of the on-chip memory. 

In terms of short-term market impact, the In-Stat/MDR senior analyst believes that the device's overall appeal will heavily depend on its price. If the 1GHz DSP is too expensive then designers who need the raw power will simply elect to run two 600MHz chips in parallel instead. But given the performance of TI's 720 MHz device, Levy expects that the new 1GHz iterations will present a number of formidable advantages.

"We did the certification and the benchmarking on the TI's 720 MHz DSP at EEMBC, so considering that the new chip will improve on that performance by more than 33 percent the technology undoubtedly shows great promise. But another issue that needs to be clarified is power consumption. It appears to me that the new chip will perform at 1.3 watts or maybe even lower.

"With the 90-nm process moving voltages down from 1.3V down to 1.1V typical, TI is obviously going to be gaining some ground there. In addition, the 90nm process as announced by TI will given them the ability to include different types of transistors in the mix, and assign one type of transistor for the critical speed paths while employing another for the lower performance paths get the best overall power consumption performance."

In-Stat/MDR principal analyst Peter Glaskowsky commented that TI's recent 1GHz DSP demo was more of a showcase event than it was a new product demonstration. As Glaskowsky points out the demo was actually conducted using the company's current 130nm process.

"It's just TI's way to reassure designers that they have the means for achieving the next milestone on their DSP roadmap."

In addition, he would not be surprised if TI does end up implementing some additional minor changes to the architecture to take advantage of the high transistor counts of 90-nm over TI's currently-available 130-nm process.

Glaskowsky expects next year's 1GHz product release to be rolled out in tandem with new memory interfaces that will also run at higher speeds. DSPs are not able to rely on caches as much as traditional CPUs, faster memory interfaces must proceed in parallel with DSP development. 

That depends on the code that the DSP is intended to run, with some coding not as sensitive to memory speed/core speed matching. "But I would expect faster memory interfaces as well," added Glaskowsky.

Next-Generation Product Applications

The 1GHz DSPs are expected to be particularly well-suited for infrastructure and network equipment applications, where a high level of processing performance is required in order to enable the delivery of real-time broadcast-quality video-on-demand over all-digital networks. In addition, TI expects the technology to be used in the development of adaptive antenna array technologies for wireless networks, where speed is a critical function in the real-time 'smart' steering of antenna beams.

TI expects the technology to have a major impact on the development of futuristic applications in virtually everything from 'smart' automobiles that automatically avoid traffic accidents to products that are destined for deployment within the human body itself.

As an example, the company points to experiments conducted at the University of Southern California, where researchers are developing silicon-based artificial vision implants for giving sight to the blind. Right now the technology  can only enable vision-impaired people to perceive vague contrasts between light and dark objects. A 1GHz DSP, claims TI, could boost the performance of the infant technology from 16 pixels to 1,000 pixels, which is equivalent to moving from only being able to see differences between day and night to being able to actually recognize movement and see larger objects. 

"The amount of information that is processed by the eye 3/4 with hundreds of millions of photo receptors in your eye and 1.2 million fibers going from the eye to your brain 3/4 the amount of image processing and the horsepower that is needed is tremendous," said Dr. Mark Humayun, professor of ophthalmology at the Keck School of Medicine of the University of Southern California and associate director of research at the Doheny Retina Institute.

"TI's advancements in digital signal processing to 1 GHz will help us to convert complicated images into data streams and do it in real-time. No one wants to see a bus that went by a minute ago, and you can imagine how interested we are in bringing real-time vision to our patients."