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Cadence Goes for Kits
Online staff -- Electronic News, 9/12/2005
Cadence Design Systems Inc. today announced the first offerings in its kits approach, an AMS methodology kit targeting analog mixed-signal (AMS) designers of wireless, wired and consumer electronics devices.
The kit, said Cadence, will allow these designers to achieve shorter, more predictable design cycles while creating reusable AMS blocks.
Cadence’s kit approach goal is to simplify the application of its technology and thereby shorten time-to-productivity. The kits address application-specific design challenges by combining a verified methodology, packaged in platform flows, with IP and consulting all demonstrated on a representative reference design.
“In line with Cadence's kit approach, Bosch made the move to Cadence’s AMS design methodology and flows to address the challenges of handling increased silicon complexity within shorter, more predictable design cycles, while maintaining zero-defect levels of quality,” Peter van Staa, a senior director at Robert Bosch GmbH, said in a statement. “These increased design capabilities and productivity, resulting from Cadence's silicon-accurate methodology and VCAD services for flow implementation, will be of key importance to Bosch going forward.”
The AMS kit is built on Cadence’s Virtuoso custom design platform with links to its Encounter digital IC design platform and its Incisive functional verification platform. Specifically, the EDA player said the components of this kit address AMS productivity challenges including fragmented analog, digital and verification design processes; parasitic effects in AMS; multiple power supplies; and AMS design migration and reuse.
Cadence garnered further support for the AMS kit from IBM.
"IBM's CMOS8RF has proven an ideal semiconductor technology for analog applications such as Bluetooth, LANs, wireless handsets and GPS applications," said Ken Torino, director of foundry products for IBM Systems and Technology Group, in the statement. "Now IBM's industry-leading process design kits will be compatible with the Cadence AMS methodology kit, beginning with CMOS8RF, which allows IBM's foundry customers to focus on their design problems by having access to Cadence's integrated methodology solutions."
Cadence also announced a second kit offering today, its optimization methodology kit for ARM processors, which the company claims helps design teams enhance performance, power utilization and area when designing with ARM cores and physical libraries.
The results of the kit build on the long-standing alliance between ARM and Cadence to more tightly integrate the companies’ products.
“These kit offerings are reflective of our strategy of delivering higher levels of productivity tuned to our customers’ end-product goals,” said Ajay Malhotra, senior VP of marketing at Cadence, in the statement. “We started in Q1 2005 with the Cadence Virtuoso Wireless Flows.”
He continued: “Customers can expect more Cadence kits in the near future in areas of wireless, networking and consumer electronics as Cadence moves to a more focused kits approach. With each Cadence kit, we focus on addressing key design challenges, reducing re-spins and increasing design productivity.
