Post a Comment
News and New Products
DFM Has Potential to Build Partnerships, But Will It?
By Ann Steffora Mutschler -- Electronic News, 2/8/2006
SANTA CLARA, CALIF. -- While not a new term by any account, design for manufacturing (DFM) is causing some of the biggest stir in the EDA industry for its promise to make chips that are more correct the first time around.
During the DesignCon trade show here, a panel of executives representing EDA, mask shops and the manufacturing arena gathered Tuesday to discuss the impact of this area on the supply chain.
Dinesh Bettadapur, president and CEO of ASML Mask Tools said the integration between the mask and the wafer is greater than it has ever been, with this occurring across mask and integration levels. Now, a static set of rules cannot capture the dynamic in the fab, as it did previously, with a clear need existing for a process model to be fed upstream into design. This process model must be then read into the relevant design steps, he explained.
Dr. Mike Smayling, CTO for the Maydan Technology Center group at Applied Materials, also said DFM is not new and it has been required since the beginning of IC design.
What is new, he said, is that lithography can’t replicate what’s drawn by designers and the problem is only getting worse. In addition, copper interconnect has more variability, and more pattern sensitivity, than previous generation interconnect, combined with 2-D structure analysis being inaccurate as the real structures become 3-D.
Also, Smayling explained, designers and fab engineers speak different technical languages with tools needed to give systematic communications and translations.
The good news is that equipment companies like Applied can impact these issues by creating tools for linking designs to the fab – the company’s OPC-Check is one tool for translating design “tags” to VeritySEM measurement sites on a wafer, then comparing the images to the original GDS-II layout.
Applied is also looking to create equipment with better intrinsic uniformity such as its eCMP tool that gives copper polish results with better within-wafer uniformity, along with equipment with Advanced Process Control, Smayling added.
Looking at the issue from another perspective, DFM is a behavior where yield is the metric of effectivity, explained Mark Miller, VP for DFM business development at Cadence Design Systems, who also believes traditional DFM is inappropriately named. The real meaning relates to post-signoff manufacturing data optimization – where there is very little “D” involved, he said.
Also, real DFM requires design implementation tools that proactively compensate for manufacturing effects, where a new frontier involves cross-domain compensation for multiple manufacturing effects, Miller noted.
“If you are finding most of your DFM problems at signoff, the battle is almost lost,” he continued.
A cousin to DFM is design for yield (DFY), which measures how well you did your DFM. “If you drill into the behaviors in the industry in years past, the contract was about sign off of rule sets and verification tools. The first big effect is that the contract is no longer wholly valid. Manufacturers say, it is if you follow certain rules, and getting it close has been the norm,” Miller said.
The industry needs more proactive work done upstream. It is no longer good enough to focus on sign off – it is a prerequisite that you understand manufacturing effects at various stages since that understanding including yield issues and limiters impact the ramp to volume.
At Xilinx, Vincent Tong, VP of the company's FPGA products group, explained that the company cut its DFM teeth on three FPGA generations of designs in 90nm and has just produced its first 65nm FPGA.
To achieve that, the programmable logic supplier maintains close collaborations with its foundry partners, including UMC, to analyze test chip results to verify DFM, along with completing many simulations runs.
These partnerships have been built over time and are critical to the company’s success with 65nm, Tong said.
Similarly, Applied’s Smayling explained, “We have to keep in mind that everyone in our industry is trying to commoditize everyone else so they can be the one to productize the final product. I think we will see strengthening partnerships to move the industry forward.”
Dinesh Bettadapur, president and CEO of ASML MaskTools, noted that there is no one company that can offer a complete DFM solution, which is why the equipment companies have been trying to figure out who to partner with.
In the area of DFM standards, Cadence’s Miller pointed out that there is a paradox between competitiveness and interoperability – there is always that first-mover advantage.
In this vein the role for standards is limited with regard to DFM, he believes.
Finally, the hottest topic concerning DFM comes down to where that data will come from in order to make truly easy to use and effective DFM tools a reality. Panelist Hamid Torabi, CTO of IBM’s jointly developed Chartered/Samsung technology platform, explained Big Blue is taking the approach of partnering with select vendors.
IBM has had end-to-end DFM capabilities for a long time and is currently coming up with a solution that Chartered and Samsung can also use with their customers.
More partnerships will likely be formed in this way that combines the manufacturing know-how, process models and design implementation to deliver chips right the first time.
