Cadence Litho-Aware DFM Tool Aims to Improve Yield

By Ann Steffora Mutschler -- Electronic News, 2/13/2006

Aiming to extend 193nm lithography to 45nm processes and beyond, San Jose-based EDA market leader Cadence Design Systems Inc. made strides in improving manufacturing yield with its Virtuoso Resolution Enhancement Technology (RET) suite of tools, meant to integrate lithography awareness directly into its Cadence Virtuoso custom design platform.

The Virtuoso RET Suite targets designs that aim for sub-90nm manufacturing technologies, making them less sensitive to critical yield-degrading lithography issues, which are de-sensitized to common lithography-process variations, Cadence explained.

Designers must consider RET because below 130nm, what is drawn is not what is printed on the mask due to a variety of lithography effects. This tool aims to make designs less sensitive to those lithography effects, explained David Thon, group director for nanometer analysis and verification at Cadence.

In addition, the further below the 130nm mark the design goes, the worse these effects become, and traditional batch optical proximity correction (OPC) tools cannot address the issues, he noted.

Therefore, Virtuoso RET is meant to allow designers to analyze and optimize designs for both performance and yield by examining precisely how target layout structures will appear in silicon by precisely modeling the distortions that are present in sub-wavelength lithography.

The tool also includes interactive model-based simulation of layout designs, batch and interactive lithography rule checking, lithography-yield analysis and optimization, and trial-based OPC capabilities utilizing critical lithographic parameters including illumination mode, exposure and focus.

To develop the Virtuoso RET suite, Cadence leveraged its developmental agreement with lithography tool provider ASML since accurately modeling of lithography effects require accurate lithography models, Thon reminded.

Finally, Elpida Memory Inc. said it has adopted the Virtuoso RET Suite for use on its advanced DRAM memory processes. Cadence said it is also working closely with well-known foundries and large IDMs.