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Mentor Graphics Uses Model Approach to Simplify 65nm Design

By Harry Yeates -- Electronics Weekly, 7/10/2006

Mentor Graphics has released Calibre nm, the latest version of its design platform, and Calibre nmDRC, a design rule checker aimed at handling escalating design complexity.

At the latest process generations, especially 65nm and below, systematic and parametric effects that result from process variations start to proliferate, and applying rules -- including recommended rules from foundries -- to check for them leads to thousands of flags.

To tackle this, EDA companies are switching to tools that use models to encapsulate these complex effects.

“Realistically there’s nothing you can do with that [thousands of exceptions] level of data,” said Joe Sawicki, VP and general manager of the design-to-silicon division at Mentor Graphics. “The amount of computation you have to do is going up as a cube over the three [90nm to 65nm to 45nm] process nodes.”

Calibre nmDRC is able to perform critical area analysis and critical feature identification, and uses concurrent analysis and debug, and incremental DRC to reduce cycle times.

“Rather than having to wait for the entire run to finish to begin seeing errors, the tool makes those immediately available as they’re found, so that they can start debugging as the run is still happening,” said Sawicki.

“Once you’ve found an error and made a change, rather than having to run the entire chip to make sure you didn’t make some other mistake, Calibre will automatically go in, understand where the change was and run verification only in the area affected by that change,” he added.

With EDA developers beginning to build their tools for multiple processors and farms, Sawicki said Calibre nm has been developed to also make efficient use of legacy SMP boxes. He claimed the model-based approach used in this and other recently announced tools would support coming process nodes.

“It’s likely more and more will move from rule-based to model-based,” said Sawicki. “We will be able to support the needs of the roadmap well beyond 32nm, 22nm, and whatever the next step is as we move away from optical lithography.”

Electronics Weekly is the London-based sister publication of Electronic News.



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