Perspectives From the Leading Edge

Without question the title of the RTI sponsored 3D Integration conference “3D Architectures for Semiconductor Integration and Packaging” is a mouthful and I therefore propose the following acronym 3D ASIP.

The 5^th annual 3D ASIP Conference proved once again to contain the most complete technical and commercial coverage in the area of 3D IC of all the available meetings. If your wanting to know where the technology stands and/or commercialization stands, this is the meeting to attend.

In the last PFTLE blog I covered the main take home messages which I felt were (1) a plea for further standardizati...Read More

Going back a few years (1969) I can recall a tune by the Stones whose chorus went :

“You can't always get what you want

 You can't always get what you want
 You can't always get what you want
 But if you try sometimes you just might find
You just might find
You get what you need................... “

...Read More

3D IC has now penetrated the WLP (Wafer Level Packaging) Conference which SMTA holds each fall in San Jose. To be fair, since all the key players in CIS (CMOS Image Sensor) technology have adopted backside TSV [ see our last discussion in PFTLE “...on Mechanical bulls, rollercoasters and CIS with TSV”, 9/26/2008] and backside wafer level redistribution there is certainly overlap here. Indeed the current CIS packages are wafer level packages.

Brewer Science / EVG

Brewer Science gave an update on the temporary bonding technology that they have developed with EVG. It is now pretty...Read More

Don’t forget - 3-D Architectures for Semiconductor Integration & Packaging is about ready to begin (November 17-19, Burlingame CA) .

Keynote speakers include:

• Mike Shapiro – CTO 3D Technology development – IBM
• Shekhar Borkar – Intel Fellow
• Gutej Sandhu – Dir of Technology – Micron

and the newest addition

• Ho-Ming Tong - Chief R&D Officer & General Manager of R&D – ASE

If your involved in microelectronics you need to get the latest industry information on this hottest of topics.

The Semiconductor International server told me that this is blog # 50 of Perspectives From the Leading Edge [PFTLE]. Since readership continues to grow, I can only assume my focus on 3D IC integration (for the most part) meets with your approval. Hopefully the information that’s shared here is helping you stay on top of this rapidly changing area. Thanks to Semi Int for supporting me in this effort and you, the readers, for coming back every week to these pages.

Before I get to the promised review of last months Sematech 3D IC workshop, I will share some new information on some past topics.

TSMC Roadmap

Evolution of 3D Market Applications

Over the past year we have watched CMOS image sensor (CIS) manufacturers follow the lead of Toshiba and one after the other announce new packaging designs that offered volumetric efficiency advancements  by incorporation of TSV. [ see “...on Mechanical Bulls, Rollercoasters and CIS with TSV”, PFTLE, 9/26/2008 ] The initial announcements of TSV based production ramps actually came last fall during a significant downturn in the CIS market, the first decline since the 2001 downturn. [ “...Read More

I hear from my Japanese friends that the phrase “open kimono” is NOT of Japanese origin but rather is an American phrase using a Japanese word. Best I can tell it stems from Silicon Valley during the 1980s Japanese acquisitions of US companies. At a certain point in the negotiations the US companies were ready to reveal the inner workings of the company to the perspective buyer / partner. At that point the Kimono was opened to show the buyer the real goods, so to speak.

I recently had a chance to interview the principals at Ziptronix and the content of that interview was distilled down into the article in the Oct Semiconductor International prin...Read More

Many of you have seen the recent press release by the EMC-3D consortium that they have reduced the cost of ownership for a 10K wafers-per-month line to less than $190 per wafer. I thought it would be of interest to the readers of PFTLE, to have them expand upon this announcement.

For those of you who are not familiar with the composition and goals of this group check out previous blogs [ PFTLE “3D Equipment & Materials Vendors Consortium” 8/26/2007] or the EMC-3D consortium web page.

The process that they describe inclu...Read More

Buckle up the ride is about to begin

Gilleys was a honky-tonk located in Pasadena, TX. Back in the early 1980s, after the movie Urban Cowboy made Gilleys infamous, my comrades and I would always make a point of ”doin’ Gilleys”when we visited Dows production facility in Freeport TX. It was the mechanical bull, not the line dancing or the Lone Star beer that drew me. Truth be told the only thing I compare to this ride was the Cyclone back in Coney Island (in NYC where I grew up). In both cases all you could do once the ride started was fasten your restraints, hold your breath, and “go with it”.

The mic...Read More

We all remember the classic line of slick Willie Clinton when confronted by grand jury interrogation about his extramarital activity in the oval office. It went something like “…well it all depends on what the meaning of is, is” That was the first thing I thought of when I saw the 3D IC headline from EE Times on Aug 11^th 2008 which read “First 3-D ICs debut” and then saw the Semiconductor International headline “S KOREA DEVELOPS WORLD'S FIRST 3D CHIP MANUFACTURING PROCESS”. Well….actually truth be told the very first thing to flash through the old synapses was “…how did someone get into production without my knowing it ??” ….but I quickly blew that thought off because that was impossible (just joking). So we’re back to...Read More

November a hot month for 3D Integration

RTI 3D Conf Nov 17-19

A few blogs ago I gave you a sneak preview of what’s going to happen at the RTI 3D Conference in the valley. The full program is now uploaded, but I wanted to specifically highlight the panel sessions. After the normal “where is the market” presentations by TechSearch [ for  full disclosure  I’ve told you before that I work on 3D market forcasts with TechSearch and co-author their 3D reports] and Yole, we have set up a panel session entitled “Examining commercialization…” ...Read More

Those of you that were alive, as I was, before central air became a standard item in every home and automobile, recall the term “dog days of summer”. No matter how hard you tried, you just couldn’t cool down because you could only get so much relief sitting in front of a fan blowing hot air at you !

As we have discussed before, cooling has always been a worry of those ordained with bringing 3D IC based products into manufacturing. As we have looked at the likely timeline for application introductions, early applications have all had one thing in common – they were applications which minimized possible thermal issues. For instance, see the very informative article by Pat Morrow, Byran Black and their Intel co-workers [ “Enabling Technologies...Read More

In my second blog ( seems like an eternity ago but it was early last August) I offered up some information sources for those trying to educate themselves on the 3D IC integration literature. Two things were clear way back in 2007: (1) the literature was growing at an exponential rate and (2) the information was scattered. Now a year later I thought it was time to update that blog.

Wiley-VCH  Handbook of 3D Integration

Every new technology needs a compilation of information that everyone in the field can go to and trust. A group of us got together ...Read More

There was significant buzz about 3D integration at Semicon West.

Bernie Meyerson, VP of the Systems & Technology Group in IBM, in his recent Semicon West keynote presentation titled, “Semiconductor Technology: A Convergence of Technology and Business Models”, indicated that silicon technology and its business model are both in the process of making dramatic changes because of, amongst other things, cost estimates for developing the 22 nm node ranging from $2 to $2.5 billion. In his concluding slide, Meyerson indicated that scaling as we know it will be over in < 10 years but that advances will continue by technologies like 3D IC integration. (a theme that we have expressed before (see Pers...Read More