A New Approach to Ultralow-k Dielectrics

Although the debate still rages about whether spin-on or CVD-based approaches for producing low-k dielectric films will ultimately be most widely used in high-volume production, it is becoming increasingly apparent that this new class of insulators with dielectric constants (k) of ≤3 will replace the conventional silica-based dielectrics that are predominately used for 130 nm device technology today.^1,2 At the anticipated insertion point for mainstream low-k use — the 90 nm node — the primary candidate materials are characterized by dielectric constants of 2.7-3.1.
 
Despite the tremendous investment that has been made to bring these first-generation low-k dielectrics toward production reality, two key concerns still loom. One issue is extendibility of the bulk dielectric constant of the low-k film to values in the 2.0-2.2 range to yield ultralow-k (ULK) dielectric film stacks with effective k values (k_eff) of ~2.5 or below to meet ITRS requirements for subsequent device generations.

Another challenge is improving reliability particularly with respect to the ultrathin barrier layers that are targeted for next-generation devices.

Several complementary factors must be pursued to provide dielectric constant extendibility: 1) Lowering the bulk dielectric constant of the low-k material. This has been most effectively accomplished by introducing porosity (reducing density) to the matrix. 2) Reducing the k_eff of the dielectric film stack by incorporating processing layers (e.g., hardmasks, CMP stops or etch stops) with lower k values than conventional materials such as silicon nitride or silicon carbide. 3) Maintaining the k_eff value of the ultralow-k dielectric film stack by preventing processing-induced damage.

Low-k films can be made porous by co-depositing the bulk dielectric with components that can be readily extracted in a subsequent (usually thermal) process step, leaving a void (pore) in place of the labile material.³ Solvents, surfactants, polymer nanoparticles and reactive functional groups are examples of pore-forming agents (porogens) that have been used to produce porous low-k films.^4,5

In conventional integration schemes, a porous ultralow-k film is often capped with one or more thin dielectric films such as SiO₂, SiC or spin-on polymers. These additional layers may be used to enhance the lithographic process by providing reflection control and/or added etching selectivity, or to protect the top surface of the porous film against damage from mechanical abrasion caused by CMP. After photolithography, the resist-patterned ultralow-k films are subjected to a number of harsh chemical treatments including plasma etching, ashing, and solvent cleaning. Penetration of reactive gases and solvents into the porous films can lead to attack on the ultralow-k films or leave residues, either of which can contribute significantly to increasing the k value of the film after processing.

Once the ultralow-k film has been patterned, a copper diffusion barrier layer such as Ta/TaN is deposited. Producing a uniform, continuous, ultrathin (≤10 nm) layer on top of a porous surface is a difficult challenge because of pore-induced surface roughness that is a significant fraction of the barrier layer thickness. Thicker coatings can provide acceptable barrier-layer properties, but the consequent increase in effective conductor resistivity would then not meet ITRS targets.

To achieve the dielectric constants required of porous ultralow-k dielectrics, porosity must be introduced into the dielectric material — the more porosity, the lower the k value and the greater the extendibility to new device generations. However, introduction of porosity makes the porous low-k film more accessible to process chemistries that degrade the ultralow-k film and increase the k value, and also degrade barrier-layer reliability. These trends tend to increase in severity as the degree of porosity increases.

This complex issue led to the development of a dielectric material that can be processed as a solid material, through CMP, with the porosity created during a final cure step to reach k values of 2.5-1.9 or even below (Fig. 1 ). In this approach, the dielectric film functions like a non-porous low-k dielectric during the aggressive chemical processing steps, and has the ultralow k value of a highly porous dielectric that is required for extendibility.

1. Flow chart of the new approach for processing spin-on low-k dielectric materials.

This new process for producing ultralow-k dielectrics provides a low-k stack that is constructed by sequentially spincoating methylsilsesquioxane (MSQ)-based dielectric and hardmask materials (with k=2.0 and 2.8, respectively). The deposited dielectric and hardmask layers are both composite films of an MSQ-based matrix polymer and cross-linked, acrylic polymer-based nanoparticles. The acrylic nanoparticles provide the mechanism for pore formation, which occurs later in the process.

At this point, the films are solid with a very low degree (~3%) of porosity due only to the intrinsic free volume of the polymers — a value comparable to or less than that observed with first-generation CVD SiOC-based low-k films.⁶

2. Cross-sectional SEM view of a patterned integration film stack, created using the new approach, shows photoresist and antireflective coatings on top of a non-porous stack of dielectric and hardmask films (k=2.2 and 2.8, respectively). Sharp interfaces are indicative of excellent adhesion between layers throughout the film stack. Thicknesses of the dielectric and hardmask films are 400 and 100 nm, respectively. (SEM courtesy of International SEMATECH)

This low degree of porosity, as well as the cross-linked nanoparticles, protect the films during conventional integration processing, solving many of the current challenges experienced with integrating porous dielectric materials with k<2.7. Following photolithography, the solid film stack is then etched and the photoresist is removed by subsequent ashing or wet cleaning steps. A SEM cross-section of an etched film stack is shown in Figure 2 .

The presence of the polymeric nanoparticles in the solid low-k dielectric is highly effective at preventing damage to the film. Infrared spectroscopy of sensitive "marker" peaks shows no detectable change after exposure to conventional plasma ashing and wet cleaning processes used to remove the photoresist and other residues that remain after etching (Fig. 3 ).

The solid film is advantageous to the critical step of barrier-layer deposition. Ellipsometric porosimetry (EP) is an effective technique for characterizing porosity and pore interconnectivity in dielectric films.⁶ Using the EP technique, it has been clearly shown that depositing a 10 nm thick TaN barrier layer completely seals the low-k film against penetration by toluene vapor probe molecules (Fig. 4 ).

3. Infrared spectra of the non-porous dielectric film (k=2.0) before (red trace) and after exposure to standard plasma ashing and solvent-based wet cleaning processes for resist removal. The carbonyl stretching resonance (1730 cm-1) caused by the acrylic nanoparticles and the Si-CH3 stretching vibration (1275 cm-1) from the MSQ matrix are sensitive indicators of plasma-induced damage. No effect on the position or intensity of these peaks is observed.

4. Ellipsometric porosimetry of the solid dielectric films (k=2.0) before (red) and after (blue) coating with a 10 nm thick TaN layer. The red curve is due to the absorption of toluene vapor into the free volume of the film. The lack of any change in the blue data points indicates that the TaN barrier has completely sealed the film. (Data courtesy of IMEC)

In comparison, a low-k dielectric film prepared from the same weight percentage of acrylic nanoparticles, converted to the porous form, required a 30 nm thick TaN layer to achieve similar pore sealing characteristics.⁷

Two alternative concepts for pore sealing involve either plasma bombardment to densify the outer several nanometers of the patterned porous low-k film to form a "crust" or depositing a thin low-k material conformally over the porous low-k film.^8,9 These approaches involve an additional process step that must be controlled in a very precise way to produce the crust or adlayer film having the necessary thickness and uniformity. If the layers are too thick, k_eff will increase. If they are too thin, the underlying porous film will not be sealed and can then be damaged.

Furthermore, these pore sealing steps are performed prior to barrier-layer deposition, but after pattern transfer. Such steps do not provide any protection against damage caused by etching, ashing or wet cleaning. In comparison, rather than relying on a thin protective layer over a porous film, the low-k film in this new integration process is a solid material that protects against processing-induced damage and elimination of the pore sealing issue with ultrathin barrier films.

After barrier layer deposition and copper electroplating, the next step in the integration process is CMP. Strong adhesion between the chemically similar MSQ-based low-k and hardmask dielectric films provide resistance to delamination and peeling during CMP. The presence of the HM2800 cap layer offers additional protection for the underlying low-k film against abrasive-induced scratching during CMP.

The final step in the integration process is the transformation of the solid, MSQ-nanoparticle composite film to its porous form. The acrylic nanoparticles, which are narrowly distributed in size around a mean diameter of 2.5 nm, are decomposed by heat or light to small molecular fragments that are readily removed from the low-k film stack (Fig. 5 ). The nanoparticles serve as a template for the formation of the pores with a similar diameter, ~2.5-3.5 nm.

5. Infrared spectra of the dielectric and hardmask (k=2.2 and 2.8, respectively) film stack before (red) and after (blue) heating at 450oC for 1 hr under a nitrogen atmosphere. The carbonyl stretching peak intensity, caused by the acrylic nanoparticles, is reduced to <1% of its initial value, indicating efficient removal of the nanoparticles through the HM2800 cap layer. The similar change in refractive index values (Table) corroborates the infrared results.

Removal of the acrylic material from the dielectric in the stack is facilitated by the deliberate incorporation of a small percentage of nanoparticles in the hardmask layer. This provides additional porosity through which the molecular byproducts of the nanoparticles can diffuse out of the film, and serves to lower the k value of the hardmask layer in the final porous ultralow-k dielectric stack. The k_eff value for the porous film stack consisting of a 400 nm thick dielectric layer and a 100 nm thick HM2800 layer is ~2.2.

This new integration approach has been validated for the critical processing steps that have been problematic when integrating porous materials. Further characterization of this process in a full dual-damascene integration scheme is underway.