Potential Tool Solutions Make a Shift
Aaron Hand, Managing Editor -- Semiconductor International, 2/1/2004
The latest edition of the International Technology Roadmap for Semiconductor (ITRS) brings with it some significant changes over the 2002 update. In the Lithography chapter, perhaps the most significant are the differences in potential solutions. Several have been bumped from near-term nodes down to longer-term solutions, while others have been dropped from the roadmap altogether. A couple noteworthy techniques have also been added. One reason for much of this change is the tenacity of optical lithography, which continues to prove itself unwilling to be killed off. Therefore, 193 nm lithography, like 248 nm lithography before it, is extending further down the roadmap than previously expected.
The 90 nm node, on the roadmap for 2004, is expected to be tackled with 193 nm tools, combined with complex resolution enhancement techniques (RETs) and strong phase shifting. Previously on the roadmap for the 90 nm node and beyond were ion projection lithography and proximity X-ray lithography, both of which have been taken off the potential solutions chart completely. And with 193 nm lithography now considered viable for the 90 nm node (further, in fact), 157 nm lithography — previously on the chart for the 90 nm node — has been bumped down to the 65 nm node. Likewise, EUV lithography, in 2001 considered for introduction at the 65 nm node, is not expected to be needed until the 32 nm node.
Immersion lithography, which makes its debut on the 2003 ITRS, is suddenly the most likely contender for the 45 node, even threatening the need for 157 nm lithography at all. "Perhaps the most significant decision to be made regarding potential solutions involves immersion lithography. If this technology proves viable, it has the potential to extend 193 nm imaging to the 45 nm node, thus delaying or obviating the introduction of 157 nm lithography. Immersion lithography could extend optical lithography close to the 32 nm node if it can be implemented using 157 nm light. Thus, immersion lithography has an impact on the possible implementation of 157 nm lithography, and then later on the timing for the insertion of next-generation lithographies." (For more on strong phase-shift masks and immersion lithography, see "Tricks With Water and Light: Extending 193 nm .")
Also new to the Potential Solutions chart is imprint lithography, which uses a template to mold the resist. On the roadmap beginning with the 32 nm node, it requires solutions for difficulties with 1× masks, defects and overlay.
For the first time in the ITRS history, the 2003 edition of the ITRS does not accelerate node timing from the previous update. Also, the CD budget has been expanded since the 2001 edition. Nonetheless, CD control remains among the top "difficult challenges" for the near and long term. Many of the legendary red brick walls in the lithography requirement tables pop up in relation to CD control. Microprocessor gate CD control is particularly taxing, reaching the status of "manufacturable solutions are NOT known" this year at the 90 nm node. Requirements state that CD control should be 3.3 nm (3σ) at that point, relaxed from 3.0 nm as noted in the 2001 edition.
As mentioned in the Grand Challenges section of the roadmap's executive summary, CD control has been made more difficult in part by resist trimming and sidewall profile control, both used to minimize the size of the effective gate length (Leff).
As in the 2001 ITRS, the Lithography chapter makes note of recent discussion over continued use of perfluorooctyl sulfonates (PFOS) in photochemicals (see "Photoresists Look to Friendlier Chemicals ," Semiconductor International , December 2003). It makes reference to something new this year, however — a chemical screening tool in the latest chapter on Environment, Safety and Health.
For additional information on lithography, go to www.semiconductor.net/lithography
